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Tungsten titanium alloy target 300mm WTi Target
Characteristics
Film performance and process adaptability
High barrier properties: WTi films have a very low diffusion coefficient, which can effectively prevent the diffusion of copper (Cu) atoms to the silicon substrate or dielectric layer, and is a key diffusion barrier material for copper interconnects in advanced processes.
Strong adhesion: The active properties of Ti significantly improve the bonding strength of the film with the substrate (such as SiO₂, low-k media) and the upper metal (such as Cu), and inhibit film peeling.
Low resistivity: The optimized grain boundary structure makes the film resistivity lower than that of pure TiN and other compounds, reducing the resistance of the interconnect line;
Stability of the sputtering process
Uniform alloy phase structure: Through high-purity raw materials and homogenization processes, ensure the consistent distribution of target components and achieve high uniformity of film thickness and components.
High sputtering rate: high density and low impurities improve sputtering efficiency and reduce process costs;
Anti-noduling and arc control: Optimized grain size and microstructure reduce particle spatter and abnormal discharge during sputtering, ensuring process stability.
Chemistry and Thermal Stability
High temperature oxidation resistance: In the high temperature environment of PVD cavity (300-500°C), WTi film maintains structural stability and inhibits performance degradation caused by oxidation.
Corrosion resistance: It has strong resistance to etching gas and wet cleaning solution to ensure subsequent process compatibility.
Flexible process compatibility
Flexible process compatibility
Reaction sputtering adaptation: WTiN composite film can be sputtered in a mixed nitrogen/argon atmosphere to further improve the barrier performance and hardness.
Multilayer film integration: compatible with Ta/TaN, Co, Ru and other film materials, supporting complex laminated structure design.
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Application
Semiconductor manufacturing
Logic chip: Diffusion barrier layer in a high-k metal gate (HKMG). Key barrier/adhesion layers of Cu interconnect (e.g., Cu/WTiN/Ti/Si structure;
Memory chip: DRAM: capacitive electrode contact layer, bit/word line blocking layer;
3D NAND: conductive adhesion layer of staircase contacts;
Flat panel display manufacturing
TFT-LCD/OLED: source/leakage electrode and gate metallization layer of thin-film transistor (TFT);
Touch panel: conductive reinforcement layer below ITO to optimize touch sensitivity;
Compound semiconductors and power devices
GaN/SiC devices: adhesion layers with ohmic contact,
Power module: Metallized diffusion barrier layer on the chip surface to inhibit elemental interdiffusion at high temperatures.
Properties Table
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